Mobile backhaul (MBH) is a transport network that provides connectivity from radio access base stations (or cell sites) to their corresponding control and switching elements located deeper in the core of a telecommunications network, i.e. the network that connects to the backbone of the telecommunications network. Mobile backhaul is currently an important area of technological advance, since the mobile backhaul will play an important part in ensuring that future networks are able to cope with the demands being imposed by applications such as wireless broadband, and the ever increasing traffic requirements being placed on telecommunication networks.
In mobile backhaul, distribution of synchronization information is a vital feature. Without proper synchronization information mobile networks are unable to function correctly. For example, in terms of Wideband Code Division Multiple Access (WCDMA), or Long Term Evolution Frequency Division Duplexing (LTE FDD), frequency synchronization is very important. The general requirement on an air interface is a frequency accuracy of 50 ppb between two base stations, as specified by the Third Generation Partnership Project (3GPP) specifications. One of the purposes is to minimize disturbance on the air interface to secure handover between radio base stations.
Newer mobile communication technologies require synchronized phase and precise Time of Day (ToD) in addition to synchronized frequency. Among these technologies are LTE Time Division Duplexing (LTE-TDD), Mobile WiMAX/TDD, Time Division Synchronous Code Division Multiple Access (TD-SCDMA), and Femtocell technology. The general requirement on the air interface is a frequency accuracy of 50 ppb and a phase/time accuracy of the order of 1 μsec (e.g. CDMA200≥±3 μsec, LTE-TDD large cell≥±5 μsec, LTE-TDD small cell≥±1.5 μsec).
As mentioned above, accompanying the development of mobile backhaul is the dramatic increase in data traffic and transmission. Mobile backhaul over Ethernet is becoming a more popular technology. Introducing time and frequency synchronization for Ethernet is therefore becoming more critical.
Distributing phase and time information using a Precision Time Protocol (PTP), as defined in IEEE technical specification 1588-2008, is an emerging packet based technology that is popular with telecommunication service providers, accompanying the boom in PTP telecommunication profiles. PTP is a protocol used to synchronize clocks throughout a network.
However, even though PTP is currently one of the areas of significant interest in the telecommunications industry, it is comparatively new, since the usable standard was only finalized in 2008. As a result, many mechanisms which are applied in a traffic network, to make the traffic network more efficient, do not consider this specific packet based time distribution technology and its special requirements (which tend to be very hardware dependent). In addition, some popular mechanisms being used in traffic networks may even affect the PTP function.
One such mechanism that can affect the functionality of a PTP function is a path diversity resiliency mechanism, which can cause path consistency issues in a PTP function, as explained below.
Typical traffic network resiliency mechanisms, for example Link Aggregation Group (LAG), Multi-Chassis Link Aggregation Group (MC-LAG) or Distributed Resilient Network Interconnect (DRNI), can cause PTP path inconsistency issues and problems. Further details of DRNI can be found in the technical specifications relating to IEEE 802.1AXbq, DRNI task group.
Link aggregation has been introduced because of the need to provide resiliency in an Ethernet network. Link aggregation involves combining (aggregating) multiple network links (or paths) in parallel to increase throughput beyond what a single link could sustain, and to also provide redundancy in case one of the links fails. The combined links form a link aggregation group (LAG). Combined link interfaces share one physical address (i.e. one Media Access Control, MAC, address). Further details of link aggregation can be found in the technical specification relating to IEEE 802.3ad, Aggregation of Multiple Link Segments.
In terms of the traffic over LAG, load balance is used to balance the traffic load among the combined links. Each packet/stream is mapped to a specific link, for example, by applying a hash algorithm based on the destination MAC address. The LAG entity on each end of the LAG carries the hash algorithm separately, and as a result for the two-way protocol, the forward direction stream and the reverse direction stream generally traverse different paths or links, i.e. due to the fact that they are directed to a particular link by a hash algorithm.
Therefore, since PTP is a two-way protocol, this will induce PTP messages that traverse different paths or links in the two directions. A consequence of this is that the timestamps of two event messages (for example synchronization and delay-request messages) are generated at different physical layer timestamp generators (such as different timestamp counters). In some cases, the links of the LAG may be physically different from each other.
FIG. 1 shows a typical example of how time messages are sent over a network that employs LAG and a precision time protocol. FIG. 1 shows a first network node 1011 (for example acting as a slave node) and a second network node 1012 (for example acting as a master node).Each network node 101 comprises a processing unit 103 (i.e. 1031, 1032). The processing units 103 comprise a PTP functional unit 105 (i.e. 1051, 1052) and a LAG functional unit 107 (i.e. 1071,1072). The first and second network nodes 1011, 1012 communicate over multiple paths or links. For ease of reference FIG. 1 shows three such paths or links 1061, 1062 and 1063. Each network node 101 comprises a plurality of interfaces or ports 104 (i.e. 10412, 10413, 10415, 10421, 10424, 10426) for interfacing with the plurality of paths or links 106.
The basic principle of PTP involves a two-way timestamp exchange. During PTP synchronization a master node 1012 sends out regular Sync Messages to a slave node 1011 via a link, for example link 1061. A first timestamp t1 is generated by a physical layer (PHY) timestamp generator located at the master node 1012, for example a master PHY counter. The first timestamp t1 corresponds to the time that the Sync Message is sent from the master node 1012 over the path 1061. A second timestamp t2 is generated by a physical layer timestamp generator located at the slave node 1011, for example a slave PHY counter. The second timestamp t2 corresponds to the time that the Sync Message is received at the slave node 1011 from the path 1061.
The slave node 1011 then sends a Delay Request message (Delay-req) to the master node 1012, shown in the example of FIG. 1 over path 1062. A third timestamp t3 is generated by a physical layer timestamp generator located at the slave node 1011, by the slave PHY counter. The third timestamp t3 corresponds to the time that the Delay Request message (Delay-req) is sent from the slave node 1011 over the path 1062. A fourth timestamp t4 is generated by a physical layer timestamp generator located at the master node 1012, by the master PHY counter. The fourth timestamp t4 corresponds to the time that the Delay-req Message is received at the master node 1012 from the path 1062.
The master node 1012 then sends a Delay Response message (Delay-resp) to the slave node 1011, over the path 1061, for enabling the slave node 1011 to collect the fourth timestamp t4.
PTP time and phase performance has two important factors that affect it, one being the accuracy of event message timestamps, and the other being symmetry on the transporting paths of event messages.
With regard to the former, i.e. event message timestamp accuracy, it can be seen from FIG. 1 that timestamps t1 and t4 are generated at a master PHY counter located at a master node 1012, while timestamps t2 and t3 are generated at a slave PHY counter located at a slave node 1011.
A PHY timestamp counter is driven by what is known as a “1588 clock” and a Pulse Per Second (PPS) signal from a 1588 local clock. Normally the 1588 local clock is implemented by a digitally controlled oscillator (DCO) and resides in a central card (control card), so the 1588 clock and PPS are distributed to PHY timestamp counters which are residing on line cards. For different cards and different PHY timestamp counters, the clock and PPS will travel along different paths, which contributes to inaccuracy problems. Furthermore, PHY timestamp counters from different vendors also have accuracy differences, which cause inaccuracy problems.
The assumption currently made on the accuracy contribution from a 2×PHY is in the order of 15 ns.
With regard to a symmetric event message transporting path, the basic assumption is that:t2−t1=t4−t3
However, any asymmetry of message paths will contribute with half of that to the error in the time offset calculation (for example, a 3 μs asymmetry would exceed the target requirement of 1.5 μs).
From the above it can be seen that this type of resiliency mechanism used in a typical Ethernet network can affect PTP path consistency, and eventually affect the PTP performance due to inaccuracies introduced by timestamp generators.
FIG. 2 shows an example of another type of network where similar problems can occur. FIG. 2 shows a Multi-Chassis Link Aggregation Group (MC-LAG), Distributed Resilient Network Interconnect (DRNI) type system, known as MC-LAG (DRNI).
This mechanism has been introduced to expand resiliency from the node to the network, addressing a key resiliency challenge that service providers have identified.
It is an enhanced form of link aggregation, providing a resilient interconnect using multiple links among one or more nodes, for example between nodes 2011 and 2012 of FIG. 2, via MC-LAG peer nodes 2111 and 2112. The MC-LAG peer nodes 2111 and 2112 share information over communication link 2065, such that failure of a particular node can result in a standby LAG being used in place of a failed LAG. As described for FIG. 1, the slave node 2011 and master node 2012 comprise a processing unit 2031,2032 and a PTP functional unit 2051,2052 and a corresponding LAG functional unit 2071,2072. Links 2061,2062,2063,2064 are connected to the master or slave nodes 2011,2012 by interfaces or ports 204 (i.e. 20412, 20413, 20421, 20424).
The MC-LAG (DRNI) system of FIG. 2 is intended to provide both node and link level redundancy into a carrier network, and also enables the load balancing of services.
Such a network can induce the same issues and problems for two-way protocols over LAG, as described above with reference to FIG. 1. Therefore, as above, this type of Ethernet resiliency method will also affect PTP path consistency issues, which will eventually affect the PTP performance.
Thus, the widely-deployed packet network resiliency mechanisms, such as LAG and MC-LAG will induce PTP path inconsistency in the two message sending directions, which introduces timestamp error and asymmetry error to the PTP offset calculation.
This problem is applied to all PTP implementations, especially in modular systems. Furthermore, in modular systems this problem can also result in the PTP function becoming unavailable.